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 DM74LS533 Octal Transparent Latch with 3-STATE Outputs
October 1988 Revised March 2000
DM74LS533 Octal Transparent Latch with 3-STATE Outputs
General Description
The DM74LS533 consists of eight latches with 3-STATE outputs for bus organized system applications. The flipflops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup times is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH the bus output is in the high impedance state. The DM74LS533 is the same as the DM74LS373, except that the outputs are inverted. For detailed specifications please see the DM74LS373 data sheet, but note that the propagation delays from data to output are 5.0 ns longer for the DM74LS533 than for the DM74LS373.
Features
s Eight latches in a single package s 3-STATE outputs for bus interfacing
Ordering Code:
Order Number DM74LS533WM DM74LS533N Package Number M20B N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagram
VCC = Pin 20 GND = Pin 10
Pin Descriptions
Pin Names D0, D7 LE OE O0-O7 Data Inputs Latch Enable Input (Active HIGH) Output Enable Input (Active LOW) Complementary 3-STATE Outputs Description
Function Table
OUTPUT Enable L L L H
L = LOW State H = HIGH State X = Don't Care Z = High Impedance State QO = Previous Condition of O
Latch Enable H H L X
D H L X X
Output O L H QO Z
(c) 2000 Fairchild Semiconductor Corporation
DS009811
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DM74LS533
Absolute Maximum Ratings(Note 1)
Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0C to +70C -65C to +150C
Note 1: The "Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The "Recommended Operating Conditions" table will define the conditions for actual device operation.
Recommended Operating Conditions
Symbol VCC VIH VIL IOH IOL TA Supply Voltage High Level Input Voltage Low Level Input Voltage High Level Output Current Low Level Output Current Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 -2.6 24 70 Nom 5 Max 5.25 Units V V V mA mA C
Electrical Characteristics
Over recommended operating free air temperature range (unless otherwise noted) Symbol VI VOH VOL Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage II IIH IIL IOS ICCZ IOZL IOZH Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current Short Circuit Output Current Supply Current 3-STATE Output Off Current LOW 3-STATE Output Off Current HIGH
Note 2: All typicals are at VCC = 5V, TA = 25C. Note 3: Not more than one output should be shorted at a time, and the duration should not exceed one second.
Conditions VCC = Min, II = -18 mA VCC = Min, IOH = Max, VIL = Max VCC = Min, IOL = Max, VIH = Min IOL = 12 mA, VCC = Min VCC = Max, VI = 7V VCC = Max, VI = 2.7V VCC = Max, VI = 0.4V VCC = Max (Note 3) VCC = Max VCC = VCCH VOZL = 0.4V VCC = VCCH VOZH = 2.7V
Min
Typ (Note 2)
Max -1.5
Units V V
2.4
3.4 0.35 0.5 0.4 0.1 20 -0.4
V mA A mA mA mA A A
-20
-100 46 -20.0 20.0
Switching Characteristics
VCC = +5.0V, TA = +25C CL = 50 pF Symbol tPLH tPHL tPLH tPHL tPZL tPZH tPHZ tPLZ Propagation Delay Data to Qx Propagation Delay LE to Qx Output Enable Time OE to Qx Output Enable Time OE to Qx Parameter Min RL = 2 k Max 23 23 30 25 22 20 20 25 ns ns ns ns Units
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2
DM74LS533
Physical Dimensions inches (millimeters) unless otherwise noted
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B
3
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DM74LS533 Octal Transparent Latch with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 4 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com


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